Electrical analysis and modeling of floating-gate fault
| Autor: | G.N. Cambon, M. Renovell |
|---|---|
| Rok vydání: | 1992 |
| Předmět: |
Engineering
Spice Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Fault (power engineering) law.invention Computer Science::Hardware Architecture Computer Science::Emerging Technologies Hardware_GENERAL law Gate oxide Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical analysis Hardware_ARITHMETICANDLOGICSTRUCTURES Electrical and Electronic Engineering business.industry Transistor Electrical engineering Condensed Matter::Mesoscopic Systems and Quantum Hall Effect Computer Graphics and Computer-Aided Design business Software Hardware_LOGICDESIGN Network analysis Voltage |
| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 11:1450-1458 |
| ISSN: | 0278-0070 |
| DOI: | 10.1109/43.177407 |
| Popis: | It is demonstrated that a floating gate transistor (FGT) is influenced by its topological environment. The equivalent gate-to-source voltage of the FGT depends on the initial charges trapped in the gate oxide, the surrounding potential of metal lines and the drain-to-source voltage of the FGT itself. An electrical study of the floating gate fault is presented. A theoretical model taking into account the influence of the transistor's environment is proposed. Analytical expressions for the equivalent gate-to-source voltage are derived, and the FGTs electrical operation mode is analyzed. This model is validated by SPICE simulations and by actual device measurements. The problem of testing for FGTs is discussed. > |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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