Effect of SiO2 Buffer Layer Thickness on Performance and Reliability of Flexible Polycrystalline Silicon TFTs Fabricated on Polyimide
Autor: | Yu-Zhe Zheng, Bo-Wei Chen, Hsiao-Cheng Chiang, Hua-Mao Chen, Ann-Kuo Chu, Yu-Ho Lin, Shin-Ping Huang, Hung Wei Li, Yu-Ju Hung, Jonathan Siher Liang, Hui-Chun Huang, Chih-Hung Tsai, Po-Yung Liao, Ting-Chang Chang, Wei-Heng Yeh, Hsueh-Hsing Lu |
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Rok vydání: | 2016 |
Předmět: |
010302 applied physics
Negative-bias temperature instability Fabrication Materials science business.industry Annealing (metallurgy) Electrical engineering 02 engineering and technology engineering.material 021001 nanoscience & nanotechnology 01 natural sciences Thermal expansion Flexible electronics Electronic Optical and Magnetic Materials Polycrystalline silicon Thin-film transistor 0103 physical sciences engineering Electrical and Electronic Engineering Composite material 0210 nano-technology business Polyimide |
Zdroj: | IEEE Electron Device Letters. 37:1578-1581 |
ISSN: | 1558-0563 0741-3106 |
DOI: | 10.1109/led.2016.2623680 |
Popis: | This letter investigates flexible polycrystalline silicon thin film transistor performance variation due to different buffer layer thicknesses. In flexible electronics, thermal expansion stress during device fabrication is inevitable. A thicker SiO2 buffer demonstrates better endurance to thermal expansion stress from the polyimide substrate during device annealing. However, if the SiO2 buffer thickness is above a critical point, its weak heat dissipation capability causes the optimal ELA crystallization condition to shift. A thermal expansion stress simulation and TEM photos were utilized to verify performance variation. Furthermore, a similar trend was observed in electrical characteristics after negative bias temperature instability. |
Databáze: | OpenAIRE |
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