Exploring opportunities to improve the performance of a reconfigurable instruction set processor

Autor:	Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis
Rok vydání:	2007
Předmět:	Instruction set Development (topology) Reduced instruction set computing Computer architecture Computer science law Opcode Integrated circuit Electrical and Electronic Engineering Architecture Encoder law.invention Domain (software engineering)
Zdroj:	International Journal of Electronics. 94:481-500
ISSN:	1362-3060 0020-7217
DOI:	10.1080/00207210701292829
Popis:	In this paper, at a reconfigurable instruction set processor (RISP) is targeted, which tightly couples a coarse-grain reconfigurable functional unit (RFU) to a RISC processor. Furthermore, the architecture is supported by a flexible development framework. By allowing the definition of alternate architectural parameters, the framework can be used to explore the design space and fine-tune the architecture at design time. Initially, two architectural enhancements, namely partial predicated execution and virtual opcode are proposed and the extensions performed in the architecture and the framework to support them, are presented. To evaluate these issues, kernels from the multimedia domain are considered and an exploration to derive an appropriate instance of the architecture is performed. The efficiency of the derived instance and the proposed enhancements are evaluated using an MPEG-2 encoder application.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::77d50c8178d4ac2d1615b254950aef8d https://doi.org/10.1080/00207210701292829 Zobrazit plný text záznamu