Single/Double Precision Floating-Point Division and Square Root Unit Based on SRT-8 Algorithm

Autor:	Yuanwu Lei, Zhu Baozhou, Yuanxi Peng, Tingting He
Rok vydání:	2016
Předmět:	Adder Significand Square root business.industry Computer science Double-precision floating-point format SIMD Latency (engineering) business Critical path method Algorithm Digital signal processing
Zdroj:	Communications in Computer and Information Science ISBN: 9789811031588 NCCET
Popis:	To meet the precision requirement of different applications and reduce latency of operation for low precision, a unified structure for IEEE-754 double-precision/SIMD single-precision floating-point division and square root operation based on SRT-8 algorithm was introduced. Special instructions were designed and independent mantissa computing unit and normalization unit are implemented. Moreover, parallel adders and QDS structure was adopted to hide the latency of look-up table, generating fast addend was used to decrease critical path, and “On-the-fly” conversion was employed for saving area-cost. Experimental results show that our proposed design can achieve low latency and low hardware overhead.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::77c7ca51439ea12f9ce470a9922ef2cc https://doi.org/10.1007/978-981-10-3159-5_1 Zobrazit plný text záznamu