Vertical double gate Z-RAM technology with remarkable low voltage operation for DRAM application

Autor:	Joong-Sik Kim, Seoung-Ju Chung, Greg Popov, Michael A. Van Buskirk, Sung-Woong Chung, Seung Hwan Lee, Sang-Min Hwang, Donghee Son, Sung-Joo Hong, Srinivasa Banna, Sungwook Park, Sang-Hoon Cho, Sunil Bhardwaj, Venkatesh P. Gopinath, Jae-Sung Roh, Jungtae Kwon, David Kim, Mayank Gupta, Tae-Su Jang
Rok vydání:	2010
Předmět:	Materials science business.industry Memory cell Logic gate Low-power electronics Hardware_INTEGRATEDCIRCUITS Electronic engineering Optoelectronics Double gate Z-RAM business Low voltage Dram Voltage
Zdroj:	2010 Symposium on VLSI Technology.
DOI:	10.1109/vlsit.2010.5556212
Popis:	Vertical double gate floating body (FB) Z-RAM memory cell technology fabricated on a recess gate DRAM technology is presented. Cell operating voltage of 0.5V with comparable static retention and > 1000x improvement in dynamic retention is reported. The reported vertical double gate FB cell is the cell with the lowest operation voltage reported to date.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::7634da74d2509370f83651735ea79ec3 https://doi.org/10.1109/vlsit.2010.5556212 Zobrazit plný text záznamu