Morphable DRAM Cache Design for Hybrid Memory Systems
Autor: | Jaehyuk Huh, Bo-Kyeong Kim, Sanghoon Cha, Chang Hyun Park |
---|---|
Rok vydání: | 2019 |
Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Exploit Memory hierarchy Computer science 02 engineering and technology High Bandwidth Memory 01 natural sciences 020202 computer hardware & architecture Non-volatile memory Computer architecture Hardware and Architecture 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Static random-access memory Cache Latency (engineering) Software Dram Information Systems |
Zdroj: | ACM Transactions on Architecture and Code Optimization. 16:1-24 |
ISSN: | 1544-3973 1544-3566 |
Popis: | DRAM caches have emerged as an efficient new layer in the memory hierarchy to address the increasing diversity of memory components. When a small amount of fast memory is combined with slow but large memory, the cache-based organization of the fast memory can provide a SW-transparent solution for the hybrid memory systems. In such DRAM cache designs, their effectiveness is affected by the bandwidth and latency of both fast and slow memory. To quantitatively assess the effect of memory configurations and application patterns on the DRAM cache designs, this article first investigates how three prior approaches perform with six hybrid memory scenarios. From the investigation, we observe no single DRAM cache organization always outperforms the other organizations across the diverse hybrid memory configurations and memory access patterns. Based on this observation, this article proposes a reconfigurable DRAM cache design that can adapt to different hybrid memory combinations and workload patterns. Unlike the fixed tag and data arrays of conventional on-chip SRAM caches, this study advocates to exploit the flexibility of DRAM caches, which can store tags and data to DRAM in any arbitrary way. Using a sample-based mechanism, the proposed DRAM cache controller dynamically finds the best organization from three candidates and applies the best one by reconfiguring the tags and data layout in the DRAM cache. Our evaluation shows that the proposed morphable DRAM cache can outperform the fixed DRAM configurations across six hybrid memory configurations. |
Databáze: | OpenAIRE |
Externí odkaz: |