Three generations of asynchronous microprocessors
Autor: | Alain J. Martin, Catherine G. Wong, Mika Nyström |
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Rok vydání: | 2003 |
Předmět: |
Very-large-scale integration
Asynchronous system business.industry Computer science Hardware_PERFORMANCEANDRELIABILITY Parallel computing Integrated circuit design Hardware and Architecture Asynchronous communication Proof of concept Embedded system Hardware_INTEGRATEDCIRCUITS Electrical and Electronic Engineering Circuit complexity business Software Hardware_LOGICDESIGN Asynchronous circuit Electronic circuit |
Zdroj: | IEEE Design & Test of Computers. 20:9-17 |
ISSN: | 0740-7475 |
Popis: | We trace the evolution of Caltech asynchronous processors from a simple proof of concept, to a high-performance MIPS-like processor using a different buffer circuit for better performance, to the latest 8051 clone targeting low-energy operation. We describe the control aspects of the evolving circuit styles. We describe these three generations of asynchronous microprocessors (Caltech asynchronous processors, MiniMIPS and Lutonium) and the corresponding circuit families and design methods. The asynchronous circuits we use are called quasidelay-insensitive (QDI) circuits. A QDI circuit involves no assumption about, or knowledge of, delays in operators and wires, except for isochronic forks, which the designer assumes have similar delays on the different branches. QDI circuits are the most conservative asynchronous circuits in terms of delays. |
Databáze: | OpenAIRE |
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