| Popis: |
Floating-point arithmetic implementation follows basic operations like addition, subtraction, multiplication and division. In scientific computation, digital signal processing rounding the number to true value leads to error in representing the original number. This paper includes a single-precision half unit biased floating-point format representation and provides the implementation technique of HUB addition and compared with standard floating-point addition. Implementation of HUB format in adding two floating-point numbers reduces the area by 20.6%, reduces the power by 16.7%. It also reduces the error due to rounding. |
