A case for intelligent RAM
| Autor: | Neal Cardwell, Kimberly Keeton, Katherine Yelick, Richard Fromm, Christos Kozyrakis, Thomas Anderson, David A. Patterson, R. Thomas |
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| Rok vydání: | 1997 |
| Předmět: |
Computer science
Registered memory CAS latency law.invention law Interleaved memory Computing with Memory Electrical and Electronic Engineering Memory refresh Computer memory Conventional memory Magnetoresistive random-access memory Dynamic random-access memory Hardware_MEMORYSTRUCTURES Hybrid Memory Cube business.industry Sense amplifier Uniform memory access Semiconductor memory Memory bandwidth Memory controller Memory management Hardware and Architecture Embedded system Computer data storage Non-volatile random-access memory Memory rank business Software Dram |
| Zdroj: | IEEE Micro. 17:34-44 |
| ISSN: | 0272-1732 |
| DOI: | 10.1109/40.592312 |
| Popis: | Two trends call into question the current practice of fabricating microprocessors and DRAMs as different chips on different fabrication lines. The gap between processor and DRAM speed is growing at 50% per year; and the size and organization of memory on a single DRAM chip is becoming awkward to use, yet size is growing at 60% per year. Intelligent RAM, or IRAM, merges processing and memory into a single chip to lower memory latency, increase memory bandwidth, and improve energy efficiency. It also allows more flexible selection of memory size and organization, and promises savings in board area. This article reviews the state of microprocessors and DRAMs today, explores some of the opportunities and challenges for IRAMs, and finally estimates performance and energy efficiency of three IRAM designs. |
| Databáze: | OpenAIRE |
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