A 12-bit 200KS/s SAR ADC with digital self-calibration
| Autor: | Xiaojie Zhang, Liyang Guo, Maodong Wang, Xinghua Wang |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Offset (computer science)
Spurious-free dynamic range Comparator Computer science business.industry 12-bit 020208 electrical & electronic engineering Electrical engineering 020206 networking & telecommunications Successive approximation ADC 02 engineering and technology law.invention Capacitor Effective number of bits law Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Detection theory business |
| Zdroj: | 2017 IEEE 2nd Advanced Information Technology, Electronic and Automation Control Conference (IAEAC). |
| Popis: | Aiming at the application of neural signal detection system, this paper designs a 12-bit 200KS/s high resolution successive approximation analog-to-digital converter (SAR ADC) fabricated in SMIC 0.18-μm process. An optimized digital self-calibration technique is proposed to correct the static offset of the comparator and the mismatch of the capacitor array by using a correction capacitor array, achieving 1-bit improvement of ENOB. Simulation results show that, when the input signal is 46K, the ADC fulfills an SNDR of 71.55dB and an SFDR of 91.82dB with a 200KS/s sampling rate, while the ADC only can achieve an SNDR of 65.85dB and an SFDR of 78.83dB before calibration. With the ENOB of 11.59 bit, the self-calibration SAR ADC consumes 336μW at 1.8 V power supply. |
| Databáze: | OpenAIRE |
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