| Autor: |
Chia-Cheng Ho, Liang-Gi Yao, Tsu-Hsiu Perng, Chia-Pin Lin, Chu-Yun Fu, Chia-Feng Hu, Chih-Hao Chang, Chia-Cheng Chen, Ta-Ming Kuan, Hun-Jan Tao, Ting-Chu Ko, Shyue-Shyh Lin, Shih-Ting Hung, Neng-Kuo Chen, Chen Tzu-Chiang, Ching-Yu Chan, Hong-Nien Lin, Ming-Feng Shieh, Hsien-Chin Lin, Clement Hsingjen Wann, Tsung-Lin Lee, Shu-Ting Yang, M. Cao, Chih-Chieh Yeh, H. C. Lin, Jeff J. Xu, Shih-Cheng Chen, Chih-Sheng Chang, Li-Shyue Lai, Jyh-Cheng Sheu, Wei-Hsiung Tseng, Feng Yuan, C.H. Chang |
| Rok vydání: |
2010 |
| Předmět: |
|
| Zdroj: |
2010 International Electron Devices Meeting. |
| DOI: |
10.1109/iedm.2010.5703473 |
| Popis: |
We show that FinFET, a leading transistor architecture candidate of choice for high performance CPU applications [1–3], can also be extended for general purpose SoC applications by proper device optimization. We demonstrate superior, best-in-its-class performance to our knowledge, as well as multi-Vt flexibility for low-operating power (LOP) applications. By high-k/metal-gate (HK/MG) and process flow optimizations, significant drive current (I ON ) improvement and leakage current (I OFF ) reduction have been achieved through equivalent oxide thickness (EOT) scaling and carrier mobility improvement. N-FinFET and P-FinFET achieve, when normalized to Weff (Weff=2xHf+Wf), I ON of 1325 µA/µm and 1000 µA/µm at 1 nA/µm leakage current under V DD of 1 V, and 960 uA/um and 690 uA/um at 1 nA/um under Vdd of 0.8V, respectively. This FinFET transistor module is promising for a 32/28nm SoC technology. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
