Electrical properties of metal–ferroelectric–insulator–semiconductor using sol–gel derived SrBi2Ta2O9 film and ultra-thin Si3N4 buffer layer

Autor: Tiao-Yuan Huang, Po-Tsun Liu, Ching Chich Leu, Ting-Chang Chang, Chao-Hsin Chien, C. H. Huang, Tseung-Yuen Tseng, Ming Jui Yang
Rok vydání: 2002
Předmět:
Zdroj: Thin Solid Films. :377-381
ISSN: 0040-6090
DOI: 10.1016/s0040-6090(02)00939-2
Popis: The electrical properties of the metal–ferroelectric–insulator–silicon memories with stacked gate configuration of Pt/SrBi 2 Ta 2 O 9 (SBT)/Si 3 N 4 /p-Si (1 0 0) were investigated. In an attempt to operate at low voltage with sufficient large memory window, various ultra-thin Si 3 N 4 buffer layers in thickness of 3.5, 2, and 0.9 nm were employed. From the results of C – V measurements, the memory window can be as large as 0.8 V at the bias amplitude of 5 V for the sample with 0.9 nm Si x N y buffer layer. Well-crystallized perovskite structures have been further confirmed by the spectra of X-ray diffraction measurements. The leakage current, which plays a very important role in the data retention, of Pt/SBT (245 nm)/Si 3 N 4 (0.9 nm)/p-Si (1 0 0) can be as low as 2.5×10 −8 A/cm 2 at 200 kV/cm. Excellent fatigue-free performance with up to 10 10 read/write cycles and good retention time of >2 h have been obtained. Optimization and scaling of SBT thin films are believed to be effective in pursuing extremely low voltage operation, high-density and liable 1T nonvolatile ferroelectric random access memories.
Databáze: OpenAIRE