A single-chip MPEG2 video decoder LSI
Autor: | Tadahiro Oku, Takayasu Sakurai, Tatsuhiko Demura, Kazukuni Kitagaki, S. Ishiwata, Hiroyuki Hara, S. Michinaka, Takayoshi Shimazawa, Tomoo Yamakage, G. Otomo, Tetsu Nagamatsu, S. Suzuki, N. Goto, T. Oto, Katsuhiro Seta, Toshinori Odaka, K. Maeguchi, Yoshiharu Uetani, Masataka Matsui |
---|---|
Rok vydání: | 2002 |
Předmět: |
Motion compensation
business.industry Computer science Motion estimation Video decoder ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION Discrete cosine transform ComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMS business Computer hardware Decoding methods Data compression |
Zdroj: | Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94. |
DOI: | 10.1109/isscc.1994.344721 |
Popis: | This MPEG2 video decoder LSI decodes MPEG2 standard bit streams. The compression algorithm in the MPEG2 is based on discrete cosine transform (DCT), variable length coding, and motion compensation similar to the MPEG1, the earlier standard. However, the processing speed should be more than four times faster than MPEG1. Moreover, several algorithms and structures to handle interlaced pictures are added to the MPEG1 standard. This LSI decodes in real time all motion-compensation modes and picture structures in MPEG2 bit streams of not only CCIR601 but also HDTV resolution. > |
Databáze: | OpenAIRE |
Externí odkaz: |