ESD protection circuit design for ultra-sensitive IO applications in advanced sub-90nm CMOS technologies

Autor:	C. Russ, F. De Ranter, K. Verhaege, Geert Wybo, B. Keppens, Markus Paul Josef Mergens, B. Van Camp, John Armer, Phillip Czeslaw Jozwiak
Rok vydání:	2005
Předmět:	Engineering Electrostatic discharge CMOS business.industry Circuit design Low-power electronics Electronic engineering Electrical engineering Thyristor Radio frequency business Voltage Electronic circuit
Zdroj:	ISCAS (2)
DOI:	10.1109/iscas.2005.1464807
Popis:	This paper presents a protection strategy for ultra-sensitive I/O containing thin gate oxides, while combining two complementary ESD design approaches: (1) low-voltage diode-chain triggered SCR clamps that allow for efficient voltage clamping; (2) active-source-pump circuits applied for effective expansion of narrow ESD design windows for ultra-thin GOX protection. The focus of the paper is on the ASP schemes while some RF aspects are covered as well.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::71258b6a321975f6a3ddf8ea9335f373 https://doi.org/10.1109/iscas.2005.1464807 Zobrazit plný text záznamu