A methodology for the implementation of MOSFETs with a high-k dielectric gate material on the design of 90 nm technology circuits
| Autor: | G. Ph. Alexiou, Nikos Konofaos |
|---|---|
| Rok vydání: | 2008 |
| Předmět: |
Engineering
business.industry Gate dielectric Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Dielectric law.invention Hardware_GENERAL law Logic gate MOSFET Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering business Gate equivalent Hardware_LOGICDESIGN High-κ dielectric Hot-carrier injection |
| Zdroj: | International Journal of Electronics. 95:333-349 |
| ISSN: | 1362-3060 0020-7217 |
| DOI: | 10.1080/00207210801976461 |
| Popis: | Up to date, MOSFETs have been made through well established techniques that use SiO2 as the gate dielectric and the related design issues are well established. The need to scale down device dimensions allowed researchers to seek for alternative materials, in order to replace SiO2 as the gate dielectric. The implementation of such MOS devices in memory or logic circuits needs to take into account the effects that the use of the new gate dielectrics has on parameters such as the threshold voltage and the drain current. Hence, parameters such as the high dielectric constant values, extra oxide charges and process related defects at the physical level must be taken into account during the device design. As far as circuit applications are concerned, these changes may substantially affect the required performance. This paper presents and provides proposals about the issue of replacing commonly used parameters of the MOSFET modelling with new parameters, in which the presence of a gate dielectric with different ... |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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