Autor:	Jan Staschulat, Fabian Wolf, Rolf Ernst
Rok vydání:	2002
Předmět:	Smart Cache Hardware and Architecture Cache coloring CPU cache Computer science Cache invalidation Parallel computing Cache Cache-oblivious algorithm Cache pollution Cache algorithms Software
Zdroj:	Design Automation for Embedded Systems. 7:271-295
ISSN:	0929-5585
DOI:	10.1023/a:1019734423460
Popis:	Verification of software running time is essential in embedded systemdesign with real-time constraints. Simulation with incomplete test patternsis unsafe for complex architectures when software running times are inputdata dependent. Formal analysis of such dependencies leads to software runningtime intervals rather than single values. These intervals depend on programproperties, execution paths and states of processes, as well as on the targetarchitecture. In the target architecture, caches have a major influence onsoftware running time. Current cache analysis techniques as a part of runningtime analysis approaches combine basic block level cache modeling with explicitor implicit program path analysis. We present an approach that extends instructionand data cache modeling from basic blocks to program segments thereby increasingthe overall running time analysis precision. We combine it with data flowanalysis based prediction of cache line contents. This novel cache analysisapproach shows high precision in the presented experiments.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::6f2cb7ac83218baf466de84798a007a5 https://doi.org/10.1023/a:1019734423460 Zobrazit plný text záznamu Full text from SpringerLink