Overview of complementary GaAs technology for high-speed VLSI circuits
| Autor: | B. Crawforth, D. Foster, Karem A. Sakallah, Trevor Mudge, Phiroze Parakh, Jonathan K. Abrokwah, S.M. Gold, R.J. Lomax, C.R. Gauthier, T. McQuire, Bruce A. Bernhardt, Richard B. Brown, T.D. Basso, M. LaMacchia, S. Stetson |
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| Rok vydání: | 1998 |
| Předmět: |
Power–delay product
Computer science Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Domino Gallium arsenide law.invention chemistry.chemical_compound law Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering Electronic circuit Very-large-scale integration business.industry Electrical engineering Logic family Microprocessor CMOS chemistry Hardware and Architecture Logic gate business Software Hardware_LOGICDESIGN Voltage |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 6:47-51 |
| ISSN: | 1557-9999 1063-8210 |
| DOI: | 10.1109/92.661245 |
| Popis: | A self-aligned complementary GaAs (CGaAs) technology (developed at Motorola) for low-power, portable, digital and mixed-mode circuits is being extended to address high-speed VLSI circuit applications. The process supports full complementary, unipolar (pseudo-DCFL), source-coupled, and dynamic (domino) logic families. Though this technology is not yet mature, it is years ahead of CMOS in terms of fast gate delays at low power supply voltages. Complementary circuits operating at 0.9 V have demonstrated power-delay products of 0.01 /spl mu/W/MHz/gate. Propagation delays of unipolar circuits are as low as 25 ps. Logic families can be mixed on a chip to trade power for delay. CGaAs is being evaluated for VLSI applications through the design of a PowerPC-architecture microprocessor. |
| Databáze: | OpenAIRE |
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