Highly Reliable Two-Step Charge-Pump Read Scheme for 1.5 F2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM
| Autor: | Jing-Yu Huang, Shyh-Shyuan Sheu, Lih-Yih Chiou, Tsai-Kan Chien, Chi-Shian Chang, Chung-Han Wu, Heng-Yuan Lee |
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| Rok vydání: | 2018 |
| Předmět: |
Resistive touchscreen
Computer science 020208 electrical & electronic engineering 0211 other engineering and technologies Process (computing) 02 engineering and technology Flash memory Power (physics) Resistive random-access memory Stack (abstract data type) 0202 electrical engineering electronic engineering information engineering Charge pump Electronic engineering Electrical and Electronic Engineering Macro 021106 design practice & management |
| Zdroj: | IEEE Transactions on Circuits and Systems II: Express Briefs. 65:1234-1238 |
| ISSN: | 1558-3791 1549-7747 |
| DOI: | 10.1109/tcsii.2017.2778246 |
| Popis: | Among the emerging types of memory, resistive random-access memory (ReRAM) units offer faster write speeds and consume less power than those of flash memory units. With the advancement of 3-D stack technology, 3-D nonvolatile memories (NVMs) are under active development to satisfy the requirements of new applications. This brief proposes a 1.5 F2/bit nonlinear sub-teraohm vertical ReRAM (V-ReRAM) and a sensing ultrahigh-resistance read scheme that not only accurately senses sub-picoampere currents but also reduces sneak current effects. A 2-Kb V-ReRAM macro unit was fabricated using a 0.15- $\mu \text{m}$ CMOS process and the Industrial Technology Research Institute’s zero-transistor-four-ReRAM V-ReRAM back-end-of-line process. The proposed read scheme increased the sensing margin by eight times when compared with the current-mirror type, a commonly used read scheme for NVMs. Additionally, the memory bit size was smaller than one-transistor-N-ReRAM V-ReRAM. |
| Databáze: | OpenAIRE |
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