Timing analysis for thermally robust clock distribution network design for 3D ICs
Autor: | Byung-Hyun Lee, Sung Joo Park, Sang Min Lee, Nitish Natu, Kee Sup Kim, Woonghwan Ryu, Madhavan Swaminathan |
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Rok vydání: | 2013 |
Předmět: |
Power management
Engineering business.industry Clock signal Static timing analysis Context (language use) Integrated circuit law.invention Computer Science::Hardware Architecture Temperature gradient law Hardware_INTEGRATEDCIRCUITS Electronic engineering Signal integrity business Asynchronous circuit |
Zdroj: | 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems. |
Popis: | Three-dimensional Integrated Circuits provide a solution to overcome bottlenecks in performance and power management issues. However, the drawback arises in the form of increased thermal density that results in thermal gradients that affect signal integrity. Since, the clock signal is critical for ensuring the performance of synchronous digital systems, its design is very important. In this paper we analyze the effect of thermal gradient on the clock distribution networks in the context of 3D ICs. We also propose novel methods for compensating the thermal effects which have been validated through extensive simulations and preliminary hardware measurements. |
Databáze: | OpenAIRE |
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