A 25.6-Gb/s Interface Employing PAM-4-Based Four-Channel Multiplexing and Cascaded Clock and Data Recovery Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems
| Autor: | Takashi Toi, Junji Wadatsumi, Hiroyuki Kobayashi, Yutaka Shimizu, Yuji Satoh, Makoto Morimoto, Rui Ito, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Go Urakawa, Jun Deguchi, Ryuichi Fujimoto |
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| Rok vydání: | 2022 |
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| Zdroj: | IEEE Journal of Solid-State Circuits. 57:1517-1526 |
| ISSN: | 1558-173X 0018-9200 |
| Databáze: | OpenAIRE |
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