Multiscale System Modeling of Single-Event-Induced Faults in Advanced Node Processors
| Autor: | Dolores A. Black, Matthew J. Marinella, Jeffrey D. Black, Micahel Skoufis, Luis Bustamante, Heather Quinn, Hugh J. Barnaby, Matthew Breeding, Sapan Agarwal, Ben Feinberg, Michael Lee McLain, Lawrence T. Clark, John Brunhaver, Arun Rodrigues, Matthew Cannon |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
Nuclear and High Energy Physics
Emulation 010308 nuclear & particles physics Event (computing) Computer science business.industry Hardware_PERFORMANCEANDRELIABILITY Systems modeling 01 natural sciences law.invention Microprocessor Software Nuclear Energy and Engineering Computer engineering law 0103 physical sciences Node (circuits) Transient (computer programming) Sensitivity (control systems) Electrical and Electronic Engineering business |
| Zdroj: | IEEE Transactions on Nuclear Science. 68:980-990 |
| ISSN: | 1558-1578 0018-9499 |
| DOI: | 10.1109/tns.2021.3071653 |
| Popis: | Integration-technology feature shrink increases computing-system susceptibility to single-event effects (SEE). While modeling SEE faults will be critical, an integrated processor’s scope makes physically correct modeling computationally intractable. Without useful models, presilicon evaluation of fault-tolerance approaches becomes impossible. To incorporate accurate transistor-level effects at a system scope, we present a multiscale simulation framework. Charge collection at the 1) device level determines 2) circuit-level transient duration and state-upset likelihood. Circuit effects, in turn, impact 3) register-transfer-level architecture-state corruption visible at 4) the system level. Thus, the physically accurate effects of SEEs in large-scale systems, executed on a high-performance computing (HPC) simulator, could be used to drive cross-layer radiation hardening by design. We demonstrate the capabilities of this model with two case studies. First, we determine a D flip-flop’s sensitivity at the transistor level on 14-nm FinFet technology, validating the model against published cross sections. Second, we track and estimate faults in a microprocessor without interlocked pipelined stages (MIPS) processor for Adams 90% worst case environment in an isotropic space environment. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|