Over Molding Process Development for a Stacked Wafer-level Chip Scale Package with Through Silicon Vias (TSVs)

Autor:	Iriguchi Shoichi, Yoshimi Takahashi, Philipp Steinmann, Yohei Koto, David C. Stepniak, Rajiv Dunne, Masazumi Amagai, Tom Bonifield
Rok vydání:	2012
Předmět:	Materials science Silicon chemistry Chip-scale package Electronic engineering Mechanical engineering chemistry.chemical_element Wafer Compression (physics)
Zdroj:	Transactions of The Japan Institute of Electronics Packaging. 5:122-131
ISSN:	1884-8028 1883-3365
DOI:	10.5104/jiepeng.5.122
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::6c35b1c8da46e59d231586edac967e44 https://doi.org/10.5104/jiepeng.5.122 Zobrazit plný text záznamu