| Autor: |
A.C. Walker, F.A.P. Tooley, M.R. Taghizadeh, M.P.Y. Desmulliez, G.S. Buller, D.T. Neilson, S.M. Prince, D.A. Baillie, J.A.B. Dines, L.C. Wilkinson, M.G. Forbes, J.F. Snowdon, B.S. Wherrett, C.R. Stanley, F. Pottier, D.G. Vass, I. Underwood, R. Williams, W. Sibbett, M.H. Dunn |
| Rok vydání: |
1997 |
| Zdroj: |
Optics in Computing. |
| DOI: |
10.1364/oc.1997.otha.4 |
| Popis: |
As part of the Scottish Collaborative Initiative in Optoelectronic Sciences (SCIOS) we have been developing an optoelectronic parallel data sorter as a technology demonstrator [1]. This system is based on 32 x 32 arrays of smart pixels produced by flip-chip solder bump assembly of InGaAs/GaAs MQW modulator/detectors with Si CMOS electronics. These devices are linked by an optical system which implements a perfect shuffle interconnection. The functionality of each of the processing nodes is selected by a combination of global electronic control signals and local optical control information which is circulated along with the data. The system aims at a clock frequency of 100 MHz which would give a sorting capacity of up to 1024 16 bit words in less than 20 µs. This corresponds to an I/O data rate of 200 Gbit/s for each of the chips in the system. The programme also includes the construction of a smaller 16-channel test system based on 4 x 4 smart pixel arrays. This paper present progress on the construction and initial tests of both these demonstrators. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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