Building blocks for persistent memory
| Autor: | Alfons Kemper, Viktor Leis, Lukas Vogel, Thomas Neumann, Alexander van Renen |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
Coroutine business.industry Computer science NAND gate 020207 software engineering 02 engineering and technology Bottleneck Hardware and Architecture 020204 information systems Embedded system 0202 electrical engineering electronic engineering information engineering Latency (engineering) business Dram Information Systems |
| Zdroj: | The VLDB Journal. 29:1223-1241 |
| ISSN: | 0949-877X 1066-8888 |
| DOI: | 10.1007/s00778-020-00622-9 |
| Popis: | I/O latency and throughput are two of the major performance bottlenecks for disk-based database systems. Persistent memory (PMem) technologies, like Intel’s Optane DC persistent memory modules, promise to bridge the gap between NAND-based flash (SSD) and DRAM, and thus eliminate the I/O bottleneck. In this paper, we provide the first comprehensive performance evaluation of PMem on real hardware in terms of bandwidth and latency. Based on the results, we develop guidelines for efficient PMem usage and four optimized low-level building blocks for PMem applications: log writing, block flushing, in-place updates, and coroutines for write latency hiding. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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