Autor: |
Gwan Choi, Anand Selvarathinam, Euncheol Kim |
Rok vydání: |
2004 |
Předmět: |
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Zdroj: |
ICCD |
DOI: |
10.1109/iccd.2003.1240949 |
Popis: |
A requirement-specific decoder design for forward error-correction in 2 Gbps optical fiber communication system is presented. Low-density parity-check codes are used to achieve high bit error rate performance. Several novel error-decoding architectures are proposed and their design configurations explored to identify optimal cost/performance design. Serial, parallel and scalable architectures are studied. The result is a scaleable architecture that consists of 1.3 million CMOS gates running at 295 MHz and it achieves a throughput of 2.51 Gbps. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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