A 20-nm physical gate length NMOSFET featuring 1.2 nm gate oxide, shallow implanted source and drain and BF2 pockets

Autor: Christian Caillat, S. Biswas, G. Lecarval, B. Dal'zotto, G. Guegan, P. Mur, D. Souil, M.E. Nier, M. Heitzmann, François Martin, Simon Deleonibus, A.M. Papon, S. Tedesco
Rok vydání: 2000
Předmět:
Zdroj: IEEE Electron Device Letters. 21:173-175
ISSN: 1558-0563
0741-3106
DOI: 10.1109/55.830972
Popis: We have demonstrated the feasibility of 20-nm gate length NMOSFET's using a two-step hard-mask etching technique. The gate oxide is 1.2-nm thick. We have achieved devices with real N/sup -/ arsenic implanted extensions and BF/sub 2/ pockets. The devices operate reasonably well down to 20-nm physical gate length. These devices are the shortest devices ever reported using a conventional architecture.
Databáze: OpenAIRE