Electrical Characteristics of Memory Devices With a High-$k$$\hbox{HfO}_{2}$ Trapping Layer and Dual $\hbox{SiO}_{2}/\hbox{Si}_{3}\hbox{N}_{4}$ Tunneling Layer
| Autor: | Ganesh S. Samudra, Won Jong Yoo, Ying Qian Wang, Yee-Chia Yeo, Wan Sik Hwang, Gang Zhang |
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| Rok vydání: | 2007 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
Materials science business.industry Electrical engineering Substrate (electronics) Flash memory Electronic Optical and Magnetic Materials Non-volatile memory Tunnel effect Logic gate Optoelectronics Electrical and Electronic Engineering business Layer (electronics) Quantum tunnelling High-κ dielectric |
| Zdroj: | IEEE Transactions on Electron Devices. 54:2699-2705 |
| ISSN: | 0018-9383 |
| DOI: | 10.1109/ted.2007.904396 |
| Popis: | A novel device structure with a high-k HfO2 charge storage layer and dual tunneling layer (DTL) (SiO2/Si3N4) is presented in this paper. Combining advantages of the high trapping efficiency of high-k materials and enhanced charge injection from the substrate through the DTL, the device achieves a fast program/erase speed and a large memory window. The device demonstrates excellent retention due to its physically thick DTL and also improved endurance without any increase of programming Vth throughout the cyclic test as compared with SONOS Flash memory devices using an Si3N4 trapping layer. |
| Databáze: | OpenAIRE |
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