| Popis: |
In recent years, the fan-out panel-level package (FOPLP) has attracted increasing attention due to its low cost while maintaining the same advantages of the fan-out wafer-level package (FOWLP) such as high I/O density and excellent performance. Compared with FOWLP, FOPLP possesses a higher carrier usage ratio and larger size, thus provides a cost-effective solution. However, FOPLP faces severe warpage problem caused by the mismatch of coefficient of thermal expansion (CTE) between the epoxy molding compound (EMC) and the carrier. In this study, a model of FOPLP featured with mold-first and die face-down approach is built and then used to evaluate and predict the warpage using ANSYS by means of the element birth and death technique based on finite element method (FEM). The effects of carrier types (glass, steel, FR4 and silicon) on warpage are analyzed. Meanwhile, some key geometric parameters affecting the warpage have also been considered, such as the thickness of the carrier, chips and EMC cap. Simulation results manifest that the difference of CTE between carrier and EMC affects the warping direction. When the CTE difference is small, the modulus is the key factor affecting the warpage direction. Increase in thickness of the carrier and its Young's modulus leads to decrease in warpage. Reducing the mismatch of CTE between carrier and EMC will reduce warpage significantly. The thickness of the EMC cap is also crucial to warpage, a large thickness can result in increase of the rigidity of the package and thus decrease of the warpage. |
