Multi Strobe Circuit for 2.133GHz Memory Test System

Autor:	Koichi Tanaka, Hirokatsu Niijima, Toshiyuki Okayasu, Kazuhiro Yamamoto, Masakatsu Suda
Rok vydání:	2006
Předmět:	Phase difference Observational error Data strobe encoding Computer science business.industry Electronic engineering Digital delay locked loop Test method Memory test business Computer hardware Jitter
Zdroj:	ITC
ISSN:	1089-3539
DOI:	10.1109/test.2006.297711
Popis:	This paper presents solutions to reduce measurement error and test time in an AC characteristic test of a source-synchronous device. In order to realize such a solution, we developed a multi strobe circuit which detects a phase difference between output clock and output data at a test cycle in real time without strobe scanning. We implemented a digital delay locked loop for precise multi strobe circuit. We achieved less than 1/5 the measurement error and less than 1/16 the test time compared with the conventional test method.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::68c9b1425aa5efd567e32acac4c14183 https://doi.org/10.1109/test.2006.297711 Zobrazit plný text záznamu