Complex ASICs verification with SystemC
| Autor: | I. Soldo, A. Randjic, N. Ostapcuk, V. Mujkovic, P. Markovic |
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| Rok vydání: | 2003 |
| Předmět: |
Electronic system-level design and verification
Functional verification Computer architecture Computer science SystemC High-level synthesis Hardware description language FpgaC Formal methods Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION computer computer.programming_language Intelligent verification |
| Zdroj: | 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595). |
| DOI: | 10.1109/miel.2002.1003347 |
| Popis: | This paper aims to present a way of complex ASIC verification by C/C++ oriented hardware description language using SystemC libraries. The solution of testbench organization is presented, as a result of complexity of design under verification, network processor PcomP. It is a general solution, new tests and parameter changes are very easy to be added, as is usage of the same testbench concept for other design. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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