Increased Single-Event Transient Pulsewidths in a 90-nm Bulk CMOS Technology Operating at Elevated Temperatures
| Autor: | Ronald D. Schrimpf, J. R. Ahlbin, Dale McMorrow, Bharat L. Bhuva, V. Ramachandran, R.L. Shuler, N. D. Pate, Matthew J. Gadlage, Balaji Narasimham, Lloyd W. Massengill, C.A. Dinkins |
|---|---|
| Rok vydání: | 2010 |
| Předmět: |
Materials science
business.industry Bipolar junction transistor Electrical engineering Ranging Electronic Optical and Magnetic Materials Reliability (semiconductor) Operating temperature CMOS Single event upset Optoelectronics Transient (oscillation) Electrical and Electronic Engineering Diffusion (business) Safety Risk Reliability and Quality business |
| Zdroj: | IEEE Transactions on Device and Materials Reliability. 10:157-163 |
| ISSN: | 1558-2574 1530-4388 |
| DOI: | 10.1109/tdmr.2009.2036719 |
| Popis: | Combinational-logic soft errors are expected to be the dominant reliability issue for advanced technologies. One of the major factors affecting the soft-error rates is single-event transient (SET) pulsewidths. The SET pulsewidths, which are controlled by drift, diffusion, and parasitic bipolar-transistor parameters, are a strong function of operating temperature. In this paper, heavy-ion induced SET pulsewidths are reported at temperatures ranging from 25°C to 100°C, as measured with an autonomous SET capture circuit. Experimental and simulation results in a 90-nm bulk CMOS technology indicate an increase of as high as 37% in measured average SET pulsewidth with increasing operating temperature, with some pulses almost 2 ns long at higher temperatures. The increase in the SET pulsewidth can be explained by the dependence of parasitic bipolar-transistor characteristics on temperature. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|