Three-levelm-sequence generation using ternary hybrid U-gate andJRKRflip-flop logic primitives

Autor:	J. J. Blakley, S. J. Laverty, J. A. C. Webb
Rok vydání:	1992
Předmět:	Engineering Sequence Ternary numeral system business.industry Circuit design Parallel computing Three level law.invention law Logic gate Electronic engineering Electrical and Electronic Engineering business Ternary operation Realization (systems) Flip-flop Hardware_LOGICDESIGN
Zdroj:	International Journal of Electronics. 73:605-613
ISSN:	1362-3060 0020-7217
DOI:	10.1080/00207219208925694
Popis:	This paper describes a method for the design and direct hardware realization of 3-level m-sequence generators. The method is based on the use of two recently introduced ternary logic primitives: the hybrid implemented U-gate and the JRKR flip-flop sequencer. Requirements for the generation of 3-level m-sequences are discussed, and the design approach is described using an example. Possible applications and extensions of the basic design and realization approach are also noted.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::683938a1d4750ff77a7db72ecd650457 https://doi.org/10.1080/00207219208925694 Zobrazit plný text záznamu