| Popis: |
A description is given of a comprehensive built-in test approach followed in the design of a dedicated 32-b CMOS VLSI data processor chip. The approach is comprehensive in nature. All aspects of chip verification are addressed, including limited self-checking during normal operation, complete testability during production testing through full scan-path implementation on all system latches, facilitation of board level in-circuit testing through provisions of boundary scan, built-in self-test, and a test bus port that is compatible with the emerging JTAG/IEEE standards. A method used to facilitate maximum operating frequency testing is outlined. > |
