Signal/Power Integrity Co-Simulation of DDR3 Memory Module
| Autor: | Tzong-Lin Wu, Chun Shiah, Gang-Jhih Fan, Meng-Lin Wu, Tsung-Ming Wu, Chao-Kai Chan, Nicky Chau-Chun Lu |
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| Rok vydání: | 2018 |
| Předmět: |
Computer science
Noise (signal processing) Circuit design 020206 networking & telecommunications Power integrity 02 engineering and technology Decoupling capacitor Chip 020202 computer hardware & architecture Power (physics) Memory module 0202 electrical engineering electronic engineering information engineering Electronic engineering Signal integrity |
| Zdroj: | 2018 IEEE International Conference on Computational Electromagnetics (ICCEM). |
| DOI: | 10.1109/compem.2018.8496538 |
| Popis: | In this paper, a simulation methodology considering signal integrity (SI) and power integrity (PI) from the chip, package, and board levels of a double-data-rate three (DDR3) memory module is presented. For SI issues, the chip-package-board simulation indicates how to improve eye diagram by eliminating non-ideal effects of the most crucial part of the channel. For PI issues, the SI/PI co-simulation is concerned with the power distribution network (PDN) and the distribution of decoupling capacitors (De-Caps). In addition, the optimized set of de-caps by simulation provides a cost-effect way to meet the desired target impedance for acceptable simultaneous switching noise (SSN) generated in PDN due to I/O switching. Finally, the co-simulation methodology can indicate SI/PI problems before IC tape-out and reduce circuit design cycle as well. |
| Databáze: | OpenAIRE |
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