Wirelength and memory optimized rectilinear steiner minimum tree routing
| Autor: | G R Prasad, N.R Latha |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
Very-large-scale integration
Computer science 020208 electrical & electronic engineering 02 engineering and technology Parallel computing Steiner tree problem 020202 computer hardware & architecture symbols.namesake Tree (data structure) Memory management Scalability 0202 electrical engineering electronic engineering information engineering symbols Overhead (computing) Routing (electronic design automation) Time complexity |
| Zdroj: | 2017 2nd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT). |
| DOI: | 10.1109/rteict.2017.8256846 |
| Popis: | RectilinearSteiner minimal tree (RSMT) construction is a fundamental issue in designing very large scale integrated Integration (VLSI). FLUTE (Fast Look-Up table) based approach presented a fast and accurate RSMT construction for both smaller and higher degree nets. The model reduces the time complexity for RSMT construction for smaller nets, however for larger nets there exists memory overhead. Since flute basedmodel did not consider the memory requirement in constructing RSMT, the proposed work presents a memory optimized RSMT (MORSMT) construction in order to address the memory overhead for larger nets. Experiments are conducted to evaluate the performance of proposed approach over existing model for varied benchmarks in terms of computation time, memory overhead and wire length. The experimentalresults showthat the proposed model is scalable and efficient. |
| Databáze: | OpenAIRE |
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