0.026µm2 high performance Embedded DRAM in 22nm technology for server and SOC applications

Autor: Michael V. Aquilino, Brian W. Messenger, Paul D. Agnello, Oh Jung Kwon, Bhupesh Chandra, T. Tzou, T. Kirahata, Shreesh Narasimha, Daniel J. Poindexter, S.S. Iyer, Erik A. Nelson, William Y. Chang, Geng Wang, K. V. Hawkins, Jaeger Daniel, Gregory G. Freeman, S. Rombawa, Chengwen Pei, Rajendran Krishnasamy, W. Davies, Karen A. Nummy, James P. Norum, Paul C. Parries, Norman Robson, Jinping Liu, X. Wang, Rajeev Malik, Christopher D. Sheraw, X. Chen, Jeffrey B. Johnson, Xin Li, W. Kong, Ming Yin, N. Arnold, Edward P. Maciejewski, Katsunori Onishi
Rok vydání: 2014
Předmět:
Zdroj: 2014 IEEE International Electron Devices Meeting.
DOI: 10.1109/iedm.2014.7047083
Popis: This paper presents the industry's smallest Embedded Dynamic Random Access Memory (eDRAM) implemented in IBM's 22nm SOI technology. The bit cell area of 0.026µm2 achieves ∼60% scaling over the previous generation with deep trench (DT) capacitance optimized for performance and retention requirements. We report, for the first time, the asymmetric embedded stressor, cavity implant, through gate implant, and substrate n-band innovations to maintain aggressive cell scaling for the 22nm eDRAM technology.
Databáze: OpenAIRE