A Signal-Integrity Self-Test Concept for Debugging Nanometer CMOS ICs

Autor:	Marcellinus J. M. Pelgrom, P. Pavithran, Hendricus Joseph Maria Veendrick, J. Wieling, Violeta Petrescu
Rok vydání:	2006
Předmět:	Engineering Boundary scan Integrated injection logic CMOS Built-in self-test business.industry Embedded system Scan chain Mixed-signal integrated circuit Signal integrity business Process control monitoring
Zdroj:	ISSCC
DOI:	10.1109/isscc.2006.1696283
Popis:	A fully integrated signal-integrity self-test concept is implemented in a 90nm CMOS process. The outputs of different analog monitors are locally converted to digital form and then transported through a test-compatible scan chain. The temperature monitor has 4b resolution. The supply-noise monitor detects 10ps-wide pulses of 20mV. The total area overhead is
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::66dde1213ce8a9a138942b80db21f35a https://doi.org/10.1109/isscc.2006.1696283 Zobrazit plný text záznamu