A Wide I/O Memory-on-Logic Product Prototype Enabled by Through-Silicon Stacking Technology

Autor: Aurel Gunterus, M. F. Chen, Urmi Ray, Matt Nowak, Sam Gu, Amer Cassier, Sharon Chen, Ron Lindley, Brian Matthew Henderson, S. P. Jeng, Dong Wook Kim, C. H. Yu, Vidhya Ramachandran, C. H. Wu, Riko Radojcic
Rok vydání: 2013
Předmět:
Zdroj: International Symposium on Microelectronics. 2013:000442-000446
ISSN: 2380-4505
DOI: 10.4071/isom-2013-wa13
Popis: We report on a 28nm product prototype test vehicle assembled back-to-face with a 4Gb 3× nm Wide I/O DRAM chip using Through Si Stacking (TSS) technology. The high bandwidth interface of the digital chip to the wide I/O memory chip is enabled by ∼1200 μ-bump joints with pitch as small as 40μm allowing for wide memory bandwidth. With appropriate chip floor-planning, we demonstrate the mitigation of any impact to digital circuit performance and yield from TSS and the possibility to re-use 2D circuit IP in a 3D product with minimal die size growth. Our 3DIC assembly process allows for a compact form-factor package with
Databáze: OpenAIRE