| Autor: |
Doo-gon Kim, Yeong-Taek Lee, Myounggon Kang, Byung Yong Choi, Chang-Hyun Kim, Soonwook Hwang, Kinam Kim, Ki-Tae Park |
| Rok vydání: |
2008 |
| Předmět: |
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| Zdroj: |
IEEE Journal of Solid-State Circuits. 43:919-928 |
| ISSN: |
0018-9200 |
| Popis: |
A new MLC NAND page architecture is presented as a breakthrough solution for sub-40-nm MLC NAND flash memories and beyond. To reduce cell-to-cell interference which is well known as the most critical scaling barrier for NAND flash memories, a novel page architecture including temporary LSB storing program and parallel MSB program schemes is proposed. A BL voltage modulated ISPP scheme was used as parallel MSB programming in order to reduce cell-to-cell interference caused by the order in which the cells are programmed. By adopting the proposed page architecture, the number of neighbor cells that are programmed after programming a selected cell in BL direction as well as their amount of T/th shift during programming can be suppressed largely without increasing memory array size. Compared to conventional architecture it leads to a reduction of BL-BL cell-to-cell interference by almost 100%, and of WL-WL and diagonal cell-to-cell interferences by 50% at the 60 nm technology node. The proposed architecture enables also to improve average MLC program speed performance by 11% compared with conventional architecture, thanks to its fast LSB program performance. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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