High Speed Multi-channel Data Cache Design Based on DDR3 SDRAM
| Autor: | Xiaofeng Yang, Ancheng Liu, Jinjin Wang |
|---|---|
| Rok vydání: | 2022 |
| Zdroj: | Proceedings of the 2022 5th International Conference on Artificial Intelligence and Pattern Recognition. |
| DOI: | 10.1145/3573942.3573972 |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|