| Autor: |
Tae-Young Jeong, Jinseok Kim, Myungsoo Yeo, Jonghyuk Park, Miji Lee, Sari Windu, Hyunjun Choi, Yuri Choi, Yunkyung Jo, Mi-ji Lee, Sangwoo Pae |
| Rok vydání: |
2017 |
| Předmět: |
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| Zdroj: |
2017 IEEE International Interconnect Technology Conference (IITC). |
| Popis: |
In this paper, we investigated the IMD (Inter-metal Dielectric) TDDB model where the BEOL interconnect physical spacing is reduced to less than 10nm as scaling progresses. IMD TDDB experiments were performed on 14 and 10 nm process technologies which uses double patterning technique having various interconnect line spacing ranging from the minimum design rule to wider spacings. The structures were examined for metal to metal (Mx-Mx) and metal to via (Vx-Mx) structures. Experimental results showed that the voltage and field acceleration parameters increased more than the model predicted below the specific spacing region due to more than expected current reduction during lower bias stress. As a result, it was found that the voltage/field acceleration parameters and the TDDB leakage depended upon the stress voltage below the certain physical spacing. This implied that the field-based TDDB model with constant field acceleration factor did not work in the narrow space region, which is about 18nm physically. Our long-term (up to 8 months of package level) TDDB results on 14nm and 10nm minimum Mx-Vx design rule structures and 1000hrs product HTOL data showed that square root E model is conservative. Power-law model was more appropriate enabling the further technology scaling will be detailed in the paper. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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