CRISP: a pipelined 32-bit microprocessor with 13-kbit of cache memory
| Autor: | D.R. Ditzel, A.D. Berenbaum, H.R. McLellan, R.D. Freeman, K.J. O'Connor, M. Shoji, B.W. Colbry |
|---|---|
| Rok vydání: | 1987 |
| Předmět: |
CPU cache
Computer science business.industry Pipeline (computing) Hardware_PERFORMANCEANDRELIABILITY Integrated circuit 32-bit law.invention Microprocessor CMOS law Embedded system Hardware_INTEGRATEDCIRCUITS Hardware_ARITHMETICANDLOGICSTRUCTURES Electrical and Electronic Engineering business Protocol (object-oriented programming) |
| Zdroj: | IEEE Journal of Solid-State Circuits. 22:776-782 |
| ISSN: | 0018-9200 |
| DOI: | 10.1109/jssc.1987.1052813 |
| Popis: | The implementation and architecture of a 172, 163-transistor single-chip general-purpose 32-b microprocessor is described. The 16-MHz chip is fabricated using a single-metal double-poly 1.75-/spl mu/m CMOS technology and is capable of a peak execution rate of over one instruction/clock. Multiple on-chip catches, pipelining, and a one-cycle I/O protocol are utilized. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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