Autor: |
Andy Miller, Akito Hiro, Romain Ridremont, John Slabbekoorn, Samuel Suhard, Robert Hsieh, Warren W. Flack, Ha-Ai Nguyen |
Rok vydání: |
2018 |
Předmět: |
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Zdroj: |
2018 IEEE 20th Electronics Packaging Technology Conference (EPTC). |
DOI: |
10.1109/eptc.2018.8654363 |
Popis: |
This study investigates creation of $1.0 \mu \mathrm{m}$ RDL structures by a damascene process utilizing a photosensitive permanent dielectric material. The advantage of the photosensitive dielectric approach is that the Cu overburden removal does not affect the quality of the embedded Cu lines. In comparison, for a semi-additive process the Cu seed etch affects the final dimensions of the RDL lines [1]. Damascene processing of RDL will also result in a flat wafer surface which greatly improves the lithographic performance for subsequent layers. Finally, the Cu line is surrounded on the sides and bottom by a Ti barrier layer which provides a Cu diffusion barrier for enhanced reliability [2, 3]. The completed $1.0 \mu \mathrm{m}$ RDL damascene process is evaluated using a test chip design that includes metrology structures for in-line monitoring and CDSEM measurements, and comb and serpentine electrical test structures. The electrical results for the damascene process show significant advantages compared to the semi-additive process. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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