Asynchronous delay doubler and binary low-pass filter for a time-delay chaotic circuit
| Autor: | Mustak E. Yalcin, Ramazan Yeniceri |
|---|---|
| Rok vydání: | 2015 |
| Předmět: |
Delay calculation
Transmission delay Contamination delay Computer science Applied Mathematics 020208 electrical & electronic engineering Network delay Elmore delay 02 engineering and technology Topology 01 natural sciences Computer Science Applications Electronic Optical and Magnetic Materials Digital delay line Control theory 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering 010301 acoustics Group delay and phase delay Asynchronous circuit |
| Zdroj: | International Journal of Circuit Theory and Applications. 44:1211-1221 |
| ISSN: | 0098-9886 |
| DOI: | 10.1002/cta.2158 |
| Popis: | Summary In this paper, an asynchronous digital circuit is introduced for increasing the amount of delay in binary delay lines in an area efficient way. The circuit that uses its slave delay line twice per delay event is called asynchronous delay doubler (ADD). The delay increases exponentially, while the number of components increases linearly in the recursive utilization of ADD. An assumption on the event interval of the input 2signal helps to design the ADD in a very simple form. Therefore, the ADD can be implemented with a small amount of logical resource (gates or look-up tables). For proper operation, interval between the events (positive edge or negative edge) on the binary input signal should be larger than the delay provided by the recursive ADD block. In order to satisfy this assumption, an auxiliary asynchronous circuit, which is called binary low-pass filter (BLPF), is also proposed. The BLPF filters out the pulses narrower than the delay generated by its recursive ADD block. The proposed ADD design is suitable especially for the applications, like random number generation, in which the deviation in amount of delay is useful as an entropy source. In order to prove the concept, a chain of recursive ADD block is implemented with BLPFs on a field-programmable gate array and utilized in a true random bit generator. Copyright © 2015 John Wiley & Sons, Ltd. |
| Databáze: | OpenAIRE |
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