A Systematic Failure Analysis Approach to Determine True Electrical Overstress Failures on Integrated Circuits
Autor: | Em Julius De La Cruz |
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Rok vydání: | 2019 |
Předmět: |
010302 applied physics
Quality management Failure type Computer science business.industry media_common.quotation_subject Process (computing) Automotive industry 020206 networking & telecommunications 02 engineering and technology Integrated circuit Root cause 01 natural sciences Reliability engineering law.invention law 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Quality (business) Failure modes of electronics business media_common |
Zdroj: | 2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA). |
Popis: | Root cause determination of electrical overstress (EOS) failures has become significantly important because of the automotive industry's continual quest for quality improvement. The determination of EOS as the failure type in a defective IC is important, but incomplete without accurately attributing the failure to a root cause such as a design flaw, manufacturing defect or exposure to electrical stresses beyond the recommended operating conditions. Further improvement in outgoing quality depends on an efficient and effective failure analysis process to distinguish between units that fail due to EOS events, where recommended operating limits are exceeded, and units that fail due to a latent defect. This paper presents a systematic approach to failure analysis of EOS that accurately determines failure root cause. Case studies are presented that illustrate the process and resulting root cause conclusions that enable implementation of appropriate corrective actions. |
Databáze: | OpenAIRE |
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