Full CMP integration of CVD TiN damascene sub-0.1-μm metal gate devices for ULSI applications
| Autor: | H. Achard, L. Ulmer, F. Ducroquet, M.E. Nier, S. Tedesco, F. Coudert, T. Farjot, J.-F. Lugand, M. Heitzmann, Simon Deleonibus, Y. Gobil, Bernard Previtali |
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| Rok vydání: | 2001 |
| Předmět: |
Materials science
Fabrication business.industry Transistor Copper interconnect Electrical engineering chemistry.chemical_element Hardware_PERFORMANCEANDRELIABILITY Electronic Optical and Magnetic Materials law.invention chemistry law Gate oxide Chemical-mechanical planarization Hardware_INTEGRATEDCIRCUITS Optoelectronics Electrical and Electronic Engineering Tin Metal gate business AND gate Hardware_LOGICDESIGN |
| Zdroj: | IEEE Transactions on Electron Devices. 48:1816-1821 |
| ISSN: | 0018-9383 |
| Popis: | Full chemical mechanical polishing (CMP) process integration of a W/TiN damascene metal gate has been optimized and is demonstrated to be compatible with ULSI circuit fabrication. Highly uniform and reliable electrical characteristics are achieved for widely ranged MOS pattern structures (from 0.1-/spl mu/m gate transistors up to 0.6-mm/sup 2/ capacitors). CVD TiN film as a damascene gate electrode shows excellent properties for MOS performances and gate oxide integrity even on ultrathin gate oxide (2-nm SiO/sub 2/). |
| Databáze: | OpenAIRE |
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