Simulating L3 caches in real time using hardware accelerated cache simulation (HACS): a case study with SPECint 2000

Autor:	J.K. Flanagan, M. Watson
Rok vydání:	2003
Předmět:	Validation methods business.industry Computer science Memory architecture Parallel computing Cache Discrete event simulation Field-programmable gate array business Computer-aided software engineering SPECint Computer hardware TRACE (psycholinguistics)
Zdroj:	SBAC-PAD
DOI:	10.1109/cahpc.2002.1180766
Popis:	Trace-driven simulation is a commonly used tool to evaluate memory-hierarchy designs. Unfortunately, trace collection is very expensive, and storage requirements for traces are very large. In this paper, we introduce HACS (Hardware Accelerated Cache Simulator), and describe the validation methods we used to demonstrate functionality. We also present some initial cache simulation results from SPECint 2000. We then propose future directions for research with HACS.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::60457822caaff520ab55fb07d2ceb923 https://doi.org/10.1109/cahpc.2002.1180766 Zobrazit plný text záznamu