Threshold Voltage Modeling of Negative Capacitance Double Gate TFET

Autor:	U S Shikha, Rekha K James, Anju Pradeep, Sumi Baby, Jobymol Jacob
Rok vydání:	2022
Zdroj:	2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID).
DOI:	10.1109/vlsid2022.2022.00062
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::5facad9e46440a634375601459815531 https://doi.org/10.1109/vlsid2022.2022.00062 Zobrazit plný text záznamu