Autor: |
Kostas Siozios, Spiridon Nikolaidis, H. Pournara, G. Koytroympezis, V. Kalenteridis, Dimitrios Soudris, Konstantinos Tatas, Ilias Pappas, Stylianos Siskos, Antonios Thanailakis |
Rok vydání: |
2004 |
Předmět: |
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Zdroj: |
IPDPS |
DOI: |
10.1109/ipdps.2004.1303112 |
Popis: |
Summary form only given. A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts: The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. The novel energy-efficient FPGA architecture was designed and simulated in STM 0.18/spl mu/m CMOS technology. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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