A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line
| Autor: | Kewal K. Saluja, Yoshinobu Higami, Shin-ya Kobayashi, Senling Wang, Hiroshi Takahashi |
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| Rok vydání: | 2017 |
| Předmět: |
business.industry
Computer science Real-time computing Electrical engineering Bridging fault 020206 networking & telecommunications 02 engineering and technology Signal lines Artificial Intelligence Hardware and Architecture 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Computer Vision and Pattern Recognition Electrical and Electronic Engineering Line (text file) business Software |
| Zdroj: | IEICE Transactions on Information and Systems. :2224-2227 |
| ISSN: | 1745-1361 0916-8532 |
| DOI: | 10.1587/transinf.2016edl8210 |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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